1. Field of the Invention
The present invention relates to a frame interline transfer (FIT) type solid state image sensor in which an electric power consumption can be saved and a temperature characteristic thereof can be maintained satisfactorily.
2. Description of the Prior Art
One conventional solid state image sensor is referred to as a frame interline transfer (FIT) type solid state image sensor. In FIG. 1 of the accompanying drawings, this conventional FIT type solid state image sensor is generally depicted by reference numeral 1 and comprises an image section (image area) 2, a storage section 3 (field memory), a horizontal transfer section 4 and a smear drain 5.
The image section 2 comprises a plurality of light sensing sections 21 disposed in a matrix fashion and first vertical transfer sections (vertical shift registers) 22, each being disposed vertically between adjacent vertically arranged light sensing sections 21 for transferring signal charges accumulated in the light sensing sections 21 in the vertical direction. A read-out gate region 23 is provided between the light sensing sections 21 and the first vertical transfer section 22.
The storage section 3 is disposed under the image section 2 and a signal charge of one field transferred by the first vertical transfer section 22 is temporarily stored in the storage section 3. The storage section 3 is composed of a plurality of vertical transfer sections (vertical shift registers) 31 and signal charges stored therein are transferred by one line each to the horizontal transfer section (horizontal shift register) 4 from which transferred signal charges are sequentially output at a predetermined timing. The horizontal transfer section 4 has at its one end a voltage converting section 41 that converts the signal charge, which is transferred to the horizontal direction, into an electrical signal (signal voltage). The voltage converting section 41 derives an image signal and the image signal is supplied through an amplifier 42 to an output terminal 43.
In the FIT solid state image sensor 1, a signal charge is transferred from the first vertical transfer section 22 to the second vertical transfer section 31 and then transferred to the horizontal transfer section 4. Thereafter, a discharge processing is effected to discharge a part of signal charges remaining in the first and second vertical transfer sections 22 and 31, i.e., unnecessary signal charges. According to this discharge processing, unnecessary signal charges remaining at the first and second vertical transfer sections 22 and 31 are transferred to the smear gate drain 5 through a smear gate region 52 and then supplied to a discharge terminal 51.
The FIT solid state image sensor 1 is connected through drivers 6A, 6B to a timing generator 7 when in use. Various control signals generated by the timing generator 7 are amplified by drivers 6A, 6B and then supplied to the FIT solid state image sensor 1, whereby the respective sections of the FIT solid state image sensor 1 are driven to output the image signal.
FIGS. 3A through 3D are respectively diagrams of waveforms of various control signals that are utilized to drive the FIT solid state image sensor 1. FIG. 3A shows a waveform of a vertical drive pulse VD. In the FIT solid state image sensor 1, unnecessary signal charges are discharged and signal charges are read out during a vertical blanking period VBLK. During the vertical blanking period VBLK, a smear gate pulse SMG whose waveform is illustrated in FIG. 3D is supplied to the smear gate region 52, thereby the smear gate 52 being opened.
During the vertical blanking period VBLK, an image section driving pulse IM whose waveform is illustrated in FIG. 3B is supplied to the image section 2 and a storage section driving pulse ST whose waveform is illustrated in FIG. 3C is supplied to the storage section 3. Of the driving pulses IM and ST, a high speed discharge pulse CLK1A is supplied to the first and second vertical transfer sections 22 and 31. Therefore, unnecessary signal charges that are still remaining in the first and second vertical transfer sections 22 and 31 immediately after signal charges had been transferred are transferred through the smear gate region 52 to the smear drain 5 from which they are supplied to the discharge terminal 51.
Then, a read-out gate pulse GP of the image section driving pulse IM is applied to the read-out gate region 23, whereby signal charges accumulated in the light sensing section 21 are transferred to the first vertical transfer section 22. Thus, the signal charges are read out. The signal charges thus read out are then transferred from the first vertical section 22 to the second vertical section 31 in response to a vertical transfer pulse CLK1B.
A line shift pulse CLK2 of the storage section drive pulse ST is then supplied to the second transfer section 31 and at a timing of this line shift pulse CLK2, the signal charge in the storage section 3 is transferred to the horizontal transfer section 4 line by line. The signal charge thus transferred will hereinafter be converted into an image signal by the aforesaid processing and then supplied to the output terminal 43.
In the conventional FIT solid state image sensor 1, as shown in FIGS. 3A through 3D, the image section driving pulse IM supplied to the image section 2 and the storage section driving pulse ST supplied to the storage section 3 are exactly the same and therefore the two driving pulses IM and ST contain the discharge pulse CLK1A, the vertical transfer pulse CLK1B and the line shift pulse CLK2. As a consequence, the line shift pulse CLK2 that is not related to the driving of the image section 2 also is supplied to the image section 2, consuming a useless electric power thereby.
Further, in the conventional FIT solid state image sensor 1, the signal charge read out to the first vertical transfer section 22 must be transferred to the second vertical transfer section 31 at high speed, requiring a lot of vertical transfer pulses CLK1B per field period as compared with other solid state image sensors such as an interline transfer (IT) type solid state image sensor or the like. Consequently, as compared with other solid state image sensors such as the IT type solid state image sensor or the like, the number with which the drivers 6A, 6B are switched is increased, which unavoidably increases an electric power consumption. Furthermore, the conventional FIT type solid state image sensor 1 consumes a large electric power as described above. There is then the problem that a quantity of generated heat is increased to exert a bad influence on the characteristics of the FIT type solid state image sensor.